Where: Denver, CO
Booth: #1825
When: November 17-22, 2013
More information: sc13.supercomputing.org

Join us in Denver for the largest international conference for the HPC community. Stop by the Acceleware booth to find out the latest information for developing and optimizing technical applications for multi-core CPUs, compute GPUs, FPGAs and MIC architecture.

Acceleware SC’13 Presentations:

Quick Performance Tips for Optimizing Your CUDA Code
Acceleware Booth #1825
Tue November 19 @ 1:00pm, Wed November 20 @ 1:00pm

New to CUDA programming? Further accelerate your applications with a few key CUDA tips, including how to make efficient use of GPU memory resources, and how to improve performance of transfers to/from the GPU.

Optimization and Performance Tuning for Intel Xeon Phi Coprocessors
Acceleware Booth #1825
Tue November 19 @ 2:00pm, Thu November 21 @ 2:00pm

Spend a few minutes with us as we demonstrate how to improve performance on Xeon Phi by tuning OpenMP and auto-vectorization pragmas. Try these on your Xeon CPUs too!

Acceleware HPC Services 
Acceleware Booth #1825
Wed November 20 @ 2:00pm, Thu November 21 @ 1:30pm

Do you need your applications to run faster? Learn how Acceleware can help you solve your HPC problems. We will provide an overview of our HPC services, and examples of how we have helped other organisations achieve higher performance.

An Introduction to OpenCL for Altera FPGAs
Altera Booth #4332
Tue November 19 @ 11am & 3pm, Wed November 20 @ 11am & 3pm, Thu November 21 @ 11:30am 

A seven slide introduction to using OpenCL to target Altera FPGAs! This high-level overview will cover the system configuration, compiler tool and its throughput analysis functionality. We will use sample kernel code to illustrate how the compiler converts OpenCL C code into a pipeline parallel FPGA circuit. Key optimization techniques will be highlighted.

Case Study: Accelerating Full Waveform Inversion via OpenCL on AMD GPUs
AMD Booth #1113
Tue November 19 @ 4:00pm, Wed November 20 @ 4:00pm

In this case study, we will share our experience accelerating a seismic algorithm on a cluster of AMD GPU compute nodes. We will discuss the strategy for partitioning the problem to take advantage of multiple GPUs, as well as key optimizations and performance results.

Optimizing Seismic Software for Intel® Xeon Phi™ Coprocessors: Lessons Learned
Intel Booth #2701
Mon November 18 @ 8:45pm, Thu November 21 @ 12:45pm

Learn from our experiences in porting and optimizing seismic exploration software to a cluster of Xeon Phi Coprocessors. We will highlight the similarities of optimizing a propagation kernel for Xeon Phi and Xeon Sandy Bridge and discuss how to improve performance with OpenMP and auto-vectorization pragmas.

Event Date: 
Sunday, November 17, 2013